Lead Design Engineer
CadenceWorkdayPUNE
Posted 13 MarFound 25 OctSeen 3 hours ago
Fit
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The Posting
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
3++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain. Good debug skills and good communication skills.
We’re doing work that matters. Help us solve what others can’t.
Facts
- Source
- Workday
- External id
- R45747
- Location
- PUNE, India
- Remote
- Not stated
- Employment
- Full time
- Posted
- 13 Mar 2024
- First seen
- 25 Oct 2026, 06:49
- Last seen
- 1 Nov 2026, 04:19
- Status
- Not yet added
- Posting id
- 140dc7a0-ceb0-57fd-b762-b609e86e2aec