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The Posting
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL).
- Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools.
- Experience in process automation with scripting.
- Experience with SystemVerilog, C++, UVM.
- Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog.
- Experience designing and implementing complex functional verification environments is required.
- Knowledge of protocols like PCIe, USB3/4, DP an added advantage.
We’re doing work that matters. Help us solve what others can’t.
Facts
- Source
- Workday
- External id
- R44006
- Location
- NOIDA, India
- Remote
- Not stated
- Employment
- Full time
- Posted
- 22 Dec 2023
- First seen
- 25 Oct 2026, 06:49
- Last seen
- 1 Nov 2026, 04:19
- Status
- Not yet added
- Posting id
- 7c2f1f5e-c44f-52a0-b413-8c24c44e0f84