Silicon Validation Engineer

Role Summary

The Silicon Validation Engineer will be responsible for functional, performance, and system validation of SoC IPs and platforms across multiple development stages. The role includes system stress testing, IP-level validation, thermal and corner testing, and debugging silicon issues using hardware- and OS-based tools.

Key Responsibilities

• Perform functional and performance validation of SoC IPs, including: ○ PCIe ○ USB ○ Ethernet ○ DDR ○ HDMI/DisplayPort ○ SPI, I2C and I3C ○ CPU cores ○ Power Management ● Execute System Validation Tests, including reset stability and stress testing. ● Conduct stress testing for CPU, storage, network, and display components. ● Perform validation across UU, Prototype, EVT, DVT, and IP stages. ● Execute testing across process, voltage, and temperature corners from 40°C to 105°C. ● Conduct validation using JTAG/HDT, UEFI, Linux, and Windows environments. ● Validate RAS features. ● Analyse MCEs, system hangs, failure logs, and error logs. ● Debug silicon issues and provide detailed technical analysis and reports. ● Handle chillers and perform the required thermal validation.

Required Skills

• Hands-on experience in SoC or silicon validation. ● Experience with hardware-debugging tools such as JTAG and HDT. ● Strong debugging, log-analysis, and system-level troubleshooting skills. ● Familiarity with Linux and Windows validation environments. ● Experience handling chillers and conducting thermal validation.