Lead Design Engineer
CadenceWorkdayBANGALORE
Posted 25 AprFound 25 OctSeen 1 hour ago
Fit
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The Posting
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.
- 4+ years of Design Verification experience with SV/UVM
- Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
- Design Verification experience verifying complex designs and leading projects from concept to verification closure.
- Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required.
- Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage.
We’re doing work that matters. Help us solve what others can’t.
Facts
- Source
- Workday
- External id
- R45755
- Location
- BANGALORE, India
- Remote
- Not stated
- Employment
- Full time
- Posted
- 25 Apr 2024
- First seen
- 25 Oct 2026, 06:49
- Last seen
- 1 Nov 2026, 04:19
- Status
- Not yet added
- Posting id
- bdd7bc06-fe39-53c9-8945-48a2dfe0e0c7