R&D Engineer
Posted 24 AugFound 19 OctSeen 5 hours ago
Fit
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The Posting
Responsible for
- Validate and sanity check existing FPGA protoyping design on hardware.
- Migrate and optimize existing FPGA prototyping designs to all Synopsys hardware platforms.
- Create and edit user documents
- Work in the lab to conduct hardware experiment including maintaining setups and equipment
Responsible for establishing personal timetables according to task assignment and supporting the related assigned project goals of other engineers.
Responsible for
- Validate and sanity check existing FPGA protoyping design on hardware.
- Migrate and optimize existing FPGA prototyping designs to all Synopsys hardware platforms.
- Create and edit user documents
- Work in the lab to conduct hardware experiment including maintaining setups and equipment
Responsible for establishing personal timetables according to task assignment and supporting the related assigned project goals of other engineers.
Facts
- Source
- Workable
- External id
- AA51BD2443
- Location
- Mountain View, CA, United States
- Remote
- Not stated
- Posted
- 24 Aug 2026
- First seen
- 19 Oct 2026, 18:42
- Last seen
- 1 Nov 2026, 16:19
- Status
- Not yet added
- Posting id
- bdd81656-0b97-52c0-bceb-438e548e0183