Skip to the page

VLSI Design Verification Engineer_2

AmbarellaWorkdayTaiwan Hsinchu
Posted 16 JulFound 31 OctSeen 8 hours ago

Fit

The keywords the posting names, against what your resume says.

Add your resume to see which of its keywords you already have, and get a resume tailored to this posting. 10 a month, free.

The Posting

AI Vision Processors For Edge Applications

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.

Job Description

We are looking for talented engineers to join our VLSI Verification team. You’ll work on next-generation SoCs, applying advanced verification methodologies (SystemVerilog/UVM, coverage-driven, assertion-based) and leveraging AI-assisted tools to accelerate testplan writing, assertion development, and debug.
Responsibilities

  • Develop and execute verification plans for complex SoCs/IPs
  • Build testbenches, assertions, and coverage models
  • Collaborate with architects, designers, and post-silicon teams
  • Ensure correctness and reliability of cutting-edge designs

Why Join Us

  • Cutting-edge verification with AI-powered flows
  • Work alongside global world-class engineers
  • Accelerated growth in a learning-driven culture

If you are smart, curious, and eager to learn, join us and shape the future of silicon innovation!

Qualifications

  • Bachelor’s, Master’s, or PhD in EE/CS or related field
  • Strong background in digital design and computer architecture
  • Experience with SystemVerilog/UVM/Verilog/C/C++ (script with Perl/Python is a plus)
  • Strong debugging, analytical, and problem-solving skills

Facts

Source
Workday
External id
JR100328
Location
Taiwan Hsinchu, Taiwan
Remote
Not stated
Employment
Full time
Posted
16 Jul 2026
First seen
31 Oct 2026, 07:14
Last seen
1 Nov 2026, 12:52
Status
Not yet added
Posting id
d48b1767-ff2c-5843-a6cd-d3965475edca